d a t a sh eet product speci?cation file under integrated circuits, ic06 december 1990 integrated circuits 74hc/hct153 dual 4-input multiplexer for a complete data sheet, please also download: the ic06 74hc/hct/hcu/hcmos logic family specifications the ic06 74hc/hct/hcu/hcmos logic package information the ic06 74hc/hct/hcu/hcmos logic package outlines
december 1990 2 philips semiconductors product speci?cation dual 4-input multiplexer 74hc/hct153 features non-inverting output separate enable for each output common select inputs see 253 for 3-state version permits multiplexing from n lines to 1 line enable line provided for cascading (n lines to 1 line) output capability: standard i cc category: msi general description the 74hc/hct153 are high-speed si-gate cmos devices and are pin compatible with low power schottky ttl (lsttl). they are specified in compliance with jedec standard no. 7a. the 74hc/hct153 have two identical 4-input multiplexers which select two bits of data from up to four sources selected by common data select inputs (s 0 , s 1 ). the two 4-input multiplexer circuits have individual active low output enable inputs (1 e, 2 e) which can be used to strobe the outputs independently. the outputs (1y, 2y) are forced low when the corresponding output enable inputs are high. the 153 is the logic implementation of a 2-pole, 4-position switch, where the position of the switch is determined by the logic levels applied to s 0 and s 1 . the logic equations for the outputs are: 1y = 1 e.(1i 0 . s 1 . s 0 +1i 1 . s 1 .s 0 + +1i 2 .s 1 . s 0 +1i 3 .s 1 .s 0 ) 2y = 2 e.(2i 0 . s 1 . s 0 +2i 1 . s 1 .s 0 + +2i 2 .s 1 . s 0 +2i 3 .s 1 .s 0 ) the 153 can be used to move data to a common output bus from a group of registers. the state of the select inputs would determine the particular register from which the data came. an alternative application is a function generator. the device can generate two functions or three variables. this is useful for implementing highly irregular random logic. the 153 is similar to the 253 but has standard outputs. quick reference data gnd = 0 v; t amb =25 c; t r =t f = 6 ns symbol parameter conditions typical unit hc hct t phl / t plh propagation delay c l = 15 pf; v cc =5 v 1i n , 2i n to ny 14 16 ns s n to ny 15 17 ns n e to ny 10 11 ns c i input capacitance 3.5 3.5 pf c pd power dissipation capacitance per multiplexer notes 1 and 2 30 30 pf notes 1. c pd is used to determine the dynamic power dissipation (p d in m w): p d =c pd v cc 2 f i + ? (c l v cc 2 f o ) where: f i = input frequency in mhz f o = output frequency in mhz c l = output load capacitance in pf v cc = supply voltage in v ? (c l v cc 2 f o ) = sum of outputs 2. for hc the condition is v i = gnd to v cc for hct the condition is v i = gnd to v cc - 1.5 v ordering information see 74hc/hct/hcu/hcmos logic package information .
december 1990 3 philips semiconductors product speci?cation dual 4-input multiplexer 74hc/hct153 pin description pin no. symbol name and function 1, 15 1 e, 2 e output enable inputs (active low) 14, 2 s 0 , s 1 common data select inputs 6, 5, 4, 3 1i 0 to 1i 3 data inputs from source 1 7 1y multiplexer output from source 1 8 gnd ground (0 v) 9 2y multiplexer output from source 2 10, 11, 12, 13 2i 0 to 2i 3 data inputs from source 2 16 v cc positive supply voltage fig.1 pin configuration. fig.2 logic symbol. fig.3 iec logic symbol. fig.4 functional diagram.
december 1990 4 philips semiconductors product speci?cation dual 4-input multiplexer 74hc/hct153 function table note 1. h = high voltage level l = low voltage level x = dont care select inputs data inputs output enable output s 0 s 1 ni 0 ni 1 ni 2 ni 3 n eny xxxxxx h l l l h h l l l l l h x x x x l h x x x x x x x x l l l l l h l h l l h h h h h h x x x x x x x x l h x x x x l h l l l l l h l h fig.5 logic diagram.
december 1990 5 philips semiconductors product speci?cation dual 4-input multiplexer 74hc/hct153 dc characteristics for 74hc for the dc characteristics see 74hc/hct/hcu/hcmos logic family specifications . output capability: standard i cc category: msi ac characteristics for 74hc gnd = 0 v; t r =t f = 6 ns; c l = 50 pf symbol parameter t amb ( c) unit test conditions 74hc v cc (v) waveforms +25 - 40 to+85 - 40 to+125 min. typ. max. min. max. min. max. t phl / t plh propagation delay 1i n to ny; 2i n to ny 47 17 14 145 29 25 180 36 31 220 44 38 ns 2.0 4.5 6.0 fig.6 t phl / t plh propagation delay s n to ny 50 18 14 150 30 26 190 38 33 225 45 38 ns 2.0 4.5 6.0 fig.7 t phl / t plh propagation delay n e to ny 33 12 10 100 20 17 125 25 21 150 30 26 ns 2.0 4.5 6.0 fig.7 t thl / t tlh output transition time 19 7 6 75 15 13 95 19 16 110 22 19 ns 2.0 4.5 6.0 figs 6 and 7
december 1990 6 philips semiconductors product speci?cation dual 4-input multiplexer 74hc/hct153 dc characteristics for 74hct for the dc characteristics see 74hc/hct/hcu/hcmos logic family specifications . output capability: standard i cc category: msi note to hct types the value of additional quiescent supply current ( d i cc ) for a unit load of 1 is given in the family specifications. to determine d i cc per input, multiply this value by the unit load coefficient shown in the table below. ac characteristics for 74hct gnd = 0 v; t r =t f = 6 ns; c l = 50 pf input unit load coefficient 1i n , 2i n n e s n 0.45 0.60 1.35 symbol parameter t amb ( c) unit test conditions 74hct v cc (v) waveforms +25 - 40 to+85 - 40 to+125 min. typ. max. min. max. min. max. t phl propagation delay 1i n to ny; 2i n to ny 19 34 43 51 ns 4.5 fig.6 t plh propagation delay 1i n to ny; 2i n to ny 13 24 30 36 ns 4.5 fig.6 t phl / t plh propagation delay s n to ny 20 34 43 51 ns 4.5 fig.7 t phl / t plh propagation delay n e to ny 14 27 34 41 ns 4.5 fig.7 t thl / t tlh output transition time 7 15 19 22 ns 4.5 figs 6 and 7
december 1990 7 philips semiconductors product speci?cation dual 4-input multiplexer 74hc/hct153 ac waveforms package outlines see 74hc/hct/hcu/hcmos logic package outlines . fig.6 waveforms showing the input (1i n , 2i n ) to output (1y, 2y) propagation delays and the output transition times. (1) hc : v m = 50%; v i = gnd to v cc . hct: v m = 1.3 v; v i = gnd to 3 v. fig.7 waveforms showing the select input (s 0 , s 1 ) and the output enable input ( e) to output (1y, 2y) propagation delays and the output transition times. (1) hc : v m = 50%; v i = gnd to v cc . hct: v m = 1.3 v; v i = gnd to 3 v.
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